DESCRIPTION CSR 1.0
Part of Network Port Registers v2.0
Registers |
|||
00h |
31:0 |
Identification e050724f |
RO static |
02h |
31:0 |
Control (unused) |
R/W |
04h |
31:0 |
Status (unused) |
RO |
06h |
15:0 |
Capability |
RO static |
07h |
15:0 |
Port id |
RO static |
08h |
15:0 |
PHY CSR 1.0 base address offset |
RO static |
09h |
15:0 |
PCS/PMA CSR 1.0 base address offset |
RO static |
0Ah |
15:0 |
MAC CSR 1.0 base address offset |
RO static |
0Bh |
15:0 |
HWIP CSR 1.0 base address offset |
RO static |
0Ch |
15:0 |
MStream Core 2.x base address offset |
RO static |
Register description
Capability register bits |
|
0 |
PHY CSR available |
1 |
PCS/PMA CSR available |
2 |
MAC CSR available |
3 |
HWIP CSR available |
4 |
MStream Core available |
5-15 |
unused |
Control & Status registers currently unused