• MSC Stream readout CSR v2.0

MSC Stream readout CSR v2.0

• SDB Device ID 0xfd880c84

• Hardware MSC16VE

• MSC16VE Registers

• MSC Stream readout CSR v1.0

Registers

• 00h - Identification fd880c84, 32 bits, RO static

• 02h - Control, R/W

  • [14] - apply histogram count enable mask for stream encoder
  • [15] - enable stream

• 03h - reserved

• 04h - Clock frequency in KHz, 32-bits, RO static

• 06h - Number of channels, RO static

• 07h - Number of external CE inputs, RO static

• 08h - Counters width (CNT_BITS), RO static

• 09h~0Fh - reserved

• 10h - External count enable monitor mask, R/W

• 11h - Stream packet build timeout in milliseconds, R/W

• 12h - Slicetimer in nanoseconds, 32-bits, R/W

MSC SDB