• TDC72VXS_Registers

TDC72VXS4 module registers v1.0

Hardware: TDC72VXS

Registers are 16 bit width. 32-bit and 64-bit data is packed as following:

Register I/O

System Registers

Base address - 0x0000, address mask - 0x3FFF.

CSR

Base address - 0x0040, address mask - 0x001F.

Reg 0x0000 - Control, R/W

• [15] - run
• [14:2] - reserved
• [1] - counters lock
• [0] - softclear

Reg 0x0001 - reserved

Reg 0x0002 - Device ID, RO

Reg 0x0003~0x0005 - reserved

Reg 0x0006 - Serial ID MSB, RO

Reg 0x0007 - reserved

Reg 0x0008 - Live Magic, R/W

Reg 0x0009 - reserved

Reg 0x000a - reserved

Reg 0x000b - Board Temperature, RO

Reg 0x000c - F/W Version, RO

Reg 0x000d - F/W Revision, RO

Reg 0x000e - Serial ID LSB, RO

Reg 0x000f - reserved

Reg 0x0010 - OneWire ID (64-bit), RO

Reg 0x0014 - reserved

Reg 0x0015 - PCB Version, RO

• [15:5] - reserved
• [4:2] - major bits
• [1:0] - minor bits

Reg 0x001C - Uptime in nanoseconds (64-bit), RO

Trigger control

Base address - 0x0100, address mask - 0x00FF.

Reg 0x0000 - Trigger CSR, R/W

• [15:1] - reserved
• [0] - clear run statistic counters

Reg 0x0001 - Trigger Source, R/W

• [0] - Timer
• [1] - LEMO
• [2] - TTC
• [3] - VXS
• [15:4] - reserved

Reg 0x0002 - Trigger Timer Period (32-bit), 24 ns step, R/W

Reg 0x0004 - Event Number Load (64-bit), R/W

• Event number will be updated when writing into reg 0x0007 performed

Reg 0x0008 - Current Event Number (64-bit), RO

Reg 0x000C - Queue of Triggers to Readout, RO

• [4:0] - Triggers queue
• [15:5] - reserved

Reg 0x000D - Current Busy Status, RO

• [0] - readout busy
• [1] - tdc busy
• [15:2] - reserved

Others - reserved

Board Level Registers

Base address - 0x4000, address mask - 0x3FFF.

RegIO Debug

Base address - 0x5000, address mask - 0x00FF.

IMPORTANT - only for debug, may be removed at any time

Stored info about regio strobes and addresses, when last regio error occured.

Reg 0x0000 - RegIO strobes

• [0] - statistic reg error
• [1] - statistic reg write
• [2] - statistic reg strobe
• [7:3] - unused
• [8] - ethernet reg error
• [9] - ethernet reg write
• [10] - ethernet reg strobe
• [14:11] - unused
• [15] - reg write after arbiter

Reg 0x0001 - Reg address after arbiter

Reg 0x0002 - Ethernet reg addr

Reg 0x0003 - Statistic reg addr

MLinkRegisters