AFI Electronics
  • Comments
  • Immutable Page
  • Menu
    • Navigation
    • RecentChanges
    • FindPage
    • Local Site Map
    • Help
    • HelpContents
    • HelpOnMoinWikiSyntax
    • Display
    • Attachments
    • Info
    • Raw Text
    • Print View
    • Edit
    • Load
    • Save
  • Login

Navigation

  • FirstPage
  • ADC
  • TDC
  • Logical
  • Interfaces
  • Systems
  • Documentation
  • Contacts
  • PrivatePage
  • RecentChanges
PCI Digitizer, VME TDC, PCI VME Master, Data Acquisition System

Upload page content

You can upload content for the page named below. If you change the page name, you can also upload content for another page. If the page name is empty, we derive the page name from the file name.

File to load page content from
Page name
Comment

  • DataFormatTDC

TDC Raw Data Format

Hardware: MTDC-64, TDC-96, PhTDC

See also: VME DAQ Rawdata Format

Data read out of the TDC is contained in 32 bit data packets. The first four bits of a packet are used to define the type of data packet. The following 4 bits are used to identify the ID of the TDC chip (programmable) generating the data. Only 8 out of the possible 16 packet types are defined for TDC data (bit 31 always set to zero by TDC). The remaining 8 packet types are added by higher levels of the DAQ system.

Data types

0

1

2

TDC header

3

TDC trailer

4

TDC leading edge time measurement

5

TDC trailing edge time measurement

6

TDC error

7

Padding (ignore it)

2 - TDC event header

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

2

TDC ID

event number

TDC timestamp

TDC ID is the programmed ID of TDC

TDC timestamp in number of 25 ns time intervals since global trigger timestamp found in event header.

3 - TDC event trailer

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

3

TDC ID

event number

TDC word count

Time measurement data format depends on resolution set.

4, 5 - Single edge measurements (normal resolution, 19 bits)

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

4/5

TDC ID

channel

time measurement

  • data type: 4 - leading, 5 - trailing.
  • channel - TDC channel number, 0 to 31
  • time measurement - leading or trailing edge measurement in programmed time resolution

4, 5 - Single edge measurements (25 ps, very high resolution, 21 bits)

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

4/5

TDC ID

channel/4

time bits [1:0]

time bits [20:2]

  • data type: 4 - leading, 5 - trailing.
  • channel/4 - TDC channel number, 0 to 7 (should be multiplied by 4)

4, 5 - Combined leading and trailing measurement, pairing mode (not used in VMEDAQ)

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

4/5

TDC ID

channel

width

leading time

  • width - pulse width in programmed time resolution
  • leading time - leading edge measurement in programmed time resolution

6 - TDC error

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

6

TDC ID

reserved

TDC error flags

TDC error flags bits:

  • [0] Hit lost in group 0 from read-out fifo overflow
  • [1] Hit lost in group 0 from L1 buffer overflow
  • [2] Hit error have been detected in group 0
  • [3] Hit lost in group 1 from read-out fifo overflow
  • [4] Hit lost in group 1 from L1 buffer overflow
  • [5] Hit error have been detected in group 1
  • [6] Hit lost in group 2 from read-out fifo overflow
  • [7] Hit lost in group 2 from L1 buffer overflow
  • [8] Hit error have been detected in group 2
  • [9] Hit lost in group 3 from read-out fifo overflow
  • [10] Hit lost in group 3 from L1 buffer overflow
  • [11] Hit error have been detected in group 3
  • [12] Hits rejected because of programmed event size limit
  • [13] Event lost (trigger FIFO ovefrlow)
  • [14] Internal fatal chip error has been detected

Most important error bits are 12 and 13. Error bit 14 should be ignored.

For detailed description of TDC please refer to HPTDC manual.

7 - Padding

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

7

0


RawData