fvme2tmwr_stat_regs
Offset |
Description |
Access |
|
00 |
CTRL [15:0] |
R /W |
|
01 |
STATUS [15:0] |
R /W |
|
... |
|||
04 |
Global Event Number [15:0] |
R / W |
|
05 |
Global Event Number [31:16] |
||
06 |
Global Event Number [47:32] |
||
07 |
Global Event Number [63:48] |
||
08 |
Global Event Timestamp [15:0] |
R |
|
09 |
Global Event Timestamp [31:16] |
||
0A |
Global Event Timestamp [47:32] |
||
0B |
Global Event Timestamp [63:48] |
||
0C |
Global Event Status [15:0] |
R |
|
0D |
|||
... |
|||
1F |
|||
CTRL bits
bit |
Description |
0 |
- |
1 |
counters update: 1: lock counters, 0: continuous update |
2 |
load Global Event Number |
15:3 |
- |
STATUS bits
bit |
Description |
0 |
WR time valid |
15:1 |
- |
STATUS register is left for compatibility, do not use. WR time valid status cant be found in WR_Status_Registers at 0060, see FVME2TMWR_Ethernet_Registers
Global Event Info
Global Event Timestamp is encoded as TAI 64-bit Timestamp. Partial compatibility with TMWR VME Registers