Size: 1142
Comment:
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Size: 1180
Comment:
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Deletions are marked like this. | Additions are marked like this. |
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|| '''Address''' || '''Module''' || '''Description''' || || 0040 - 005F || trig_eth_csr || [[MlinkCsr|M-Link CSR]] || || 0060 - 006F || regio_wr_status || [[WR_Status_Registers|WR Status]] || || 0100 - 011F || regio_cnt32_le || 2 x 32-bit Edge Sensitive Counters || || 0200 - 021F || [[fvme2tmwr_stat_regs]] || Statistic & status registers || || 0300 - 030F || eth_xoff_counters_regs || XOFF timer counters || || 0380 - 039F || regio_generic_csr_1 || fvme2_board_csr || |
|| '''Address''' || '''Module''' || '''SDB''' || '''Description''' || || 0040 - 005F || trig_eth_csr || || [[MlinkCsr|M-Link CSR]] || || 0060 - 006F || regio_wr_status ||<:> ✅ || [[WR_Status_Registers|WR Status]] || || 0100 - 011F || regio_cnt32_le || || 2 x 32-bit Edge Sensitive Counters || || 0200 - 021F || [[fvme2tmwr_stat_regs]] || || Statistic & status registers || || 0300 - 030F || eth_xoff_counters_regs || || XOFF timer counters || || 0380 - 039F || regio_generic_csr_1 || || fvme2_board_csr || |
Contents
FVME2TMWR module registers
Hardware: FVME2TMWR
See also VmeRegistersTtcm
Registers are 16 bit width. 32-bit and 64-bit data is packed as following:
Reg # |
64-bit word |
0x70 |
bits 15:0 |
0x71 |
bits 31:16 |
0x72 |
bits 47:32 |
0x73 |
bits 63:48 |
Register I/O
Address Space Allocation
Address |
Module |
SDB |
Description |
0040 - 005F |
trig_eth_csr |
|
|
0060 - 006F |
regio_wr_status |
✅ |
|
0100 - 011F |
regio_cnt32_le |
|
2 x 32-bit Edge Sensitive Counters |
0200 - 021F |
|
Statistic & status registers |
|
0300 - 030F |
eth_xoff_counters_regs |
|
XOFF timer counters |
0380 - 039F |
regio_generic_csr_1 |
|
fvme2_board_csr |
0x200 - 0x21F — Status and Statistics
Reg 0x204, Global Event Number, RO, 64-bit
0x300 - 0x30F — XOFF on/off timers
Reg 0x300, XOFF ON timer, RO, 64-bit
Reg 0x304, XOFF OFF timer, RO, 64-bit