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PCI Digitizer, VME TDC, PCI VME Master, Data Acquisition System

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  • WhiteRabbitNodeDesignRequirements

White Rabbit Node Design Requirements

  • 125 MHz low-jitter reference oscillator. 2.5 ppm accuracy, min. Must be tunable: 10ppm range, BW > 3 kHz, resolution: 16 bits

  • Helper oscillator. Frequency must allow the PLL inside the FPGA to produce 62.5 MHz. 10 ppm accuracy. Must be tunable: 100 ppm range, BW > 3 kHz, resolution: 16 bits.

  • Transceiver clock driven directly from 125 MHz reference (through dedicated input).
  • Xilinx Kintex-7, Virtex-6 or Virtex-5 (LX50T and larger)
  • Standard SFP socket
  • 24AA64 or similar I2C EEPROM
  • 1Wire ID: 18B20U
  • 2 DACs AD5662 with separate SPI interfaces

(see also https://afi-project.jinr.ru/projects/white-rabbit/wiki)


WhiteRabbit