FVME_BRIC VME Module Registers
AM 0x29 (A16 D32) Registers |
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Reg |
Address |
Name |
Access |
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0 |
0x0000 |
Control |
R/W |
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1 |
0x0004 |
Settings |
R/W |
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.. |
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9 |
0x0024 |
Status |
Read Only |
Supports base registers: Control, Status.
Status register supports bits: 0 (TTC clock status), 1 (device Ok), 2 (subdevice #0 Ok), 3 (subdevice #1 Ok), 4..7 - optional.
Additional Registers
AM 0x29, A16 D32
Write 0 to all reserved values.
Register for old BRIC
Reg 1, @0x0004, Settings, R/W
- [15:0] - window select mask
- [16] - read32, set to 0
- [17] - polarity 'doschet'
- [21:18] - overflow threshold, 31+32*N readout cards
- [31:22] - reserved
BRIC sends the contents of Settings register to BRICBOX readout chain in M-Link data frame format, one 32-bit data word.
CSR
Reg 10, @0x0028, Link 1 Status (optical, top port)
- [31:0] - reserved
Reg 11, @0x002C, Link 2 Status (middle port)
[15:0] - Link Control Frame
- [16] - Link Up
- [31:17] - fixed 0x5555
Reg 12, @0x0030, Link 3 Status (bottom port)
[15:0] - Link Control Frame
- [16] - Link Up
- [31:17] - fixed 0x5555
Link Statistic (Base 0x0100, Mask 0x00FC, RO)
Reg |
Address |
Name |
1 |
0x0000 |
middle port link down |
2 |
0x0004 |
middle port data error |
3 |
0x0008 |
middle port crc error |
4 |
0x000C |
middle port LCF timeout |
5 |
0x0010 |
middle port remote link down |
6 |
0x0014 |
middle port remote data error |
7 |
0x0018 |
middle port remote crc error |
8 |
0x001C |
middle port remote link down |
9 |
0x0020 |
bottom port link down |
10 |
0x0024 |
bottom port data error |
11 |
0x0028 |
bottom port crc error |
12 |
0x002C |
bottom port LCF timeout |
13 |
0x0030 |
bottom port remote link down |
14 |
0x0034 |
bottom port remote data error |
15 |
0x0038 |
bottom port remote crc error |
16 |
0x003C |
bottom port remote link down |
Remote Mapped Registers
VME address space 0x400-0x900 is mapped to remote BRICBOX or PCOS2 device registers: BricboxRegisters, PCOS2Registers
Subdevice #1 (bottom port)
VME to PCOS-II register map (bottom port) |
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Reg |
VME Address |
PCOS-II Address |
Name |
Access |
0 |
0x0500 |
0x0040 |
Control |
R/W |
2 |
0x0508 |
0x0042 |
Device ID |
RO |
3 |
0x050C |
0x0043 |
Factory Test |
R/W |
7 |
0x051C |
0x0047 |
Branch #1 Status |
RO |
8 |
0x0520 |
0x0048 |
Branch #2 Status |
RO |
9 |
0x0524 |
0x0049 |
Branches clock period |
R/W |
10 |
0x0528 |
0x004A |
Test Word, 32 bits |
R/W |
12 |
0x0530 |
0x004C |
Settings |
R/W |
16 |
0x0540 |
0x0050 |
64-bit Board Serial |
RO |
20 |
0x0550 |
0x0054 |
temperature |
RO |
21 |
0x0554 |
0x0055 |
reserved |
RO |
22 |
0x0558 |
0x0056 |
firmware version number, 16 bit |
RO |
23 |
0x055C |
0x0057 |
firmware revision number, 16 bit |
RO |
26 |
0x0568 |
0x005A |
link status |
RO |
Subdevice #2 (middle port)
VME to PCOS-II register map (middle port) |
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Reg |
VME Address |
PCOS-II Address |
Name |
Access |
0 |
0x0900 |
0x0040 |
Control |
R/W |
2 |
0x0908 |
0x0042 |
Device ID |
RO |
3 |
0x090C |
0x0043 |
Factory Test |
R/W |
7 |
0x091C |
0x0047 |
Branch #1 Status |
RO |
8 |
0x0920 |
0x0048 |
Branch #2 Status |
RO |
9 |
0x0924 |
0x0049 |
Branches clock period |
R/W |
10 |
0x0928 |
0x004A |
Test Word, 32 bits |
R/W |
12 |
0x0930 |
0x004C |
Settings |
R/W |
16 |
0x0940 |
0x0050 |
64-bit Board Serial |
RO |
20 |
0x0950 |
0x0054 |
temperature |
RO |
21 |
0x0954 |
0x0055 |
reserved |
RO |
22 |
0x0958 |
0x0056 |
firmware version number, 16 bit |
RO |
23 |
0x095C |
0x0057 |
firmware revision number, 16 bit |
RO |
26 |
0x0968 |
0x005A |
link status |
RO |