FVME2TMWR Raw Data Format

Hardware: FVME2TM

See also: TTCM Data Format, VME DAQ Rawdata Format

Data Types

Data types

0

logic state counters, matched (excluding dead time)

1

logic state counters, all (unblocked)

2

TAI timestamp and Global Event Number

3

4

relative timestamp low

5

relative timestamp high

6

7

input counters

Normal spill data

TAI Timecode

Timecode in TAI (International Atomic Time) scale is received by White Rabbit interface.

Global Event Number is received from Central Trigger Processor.

2 - TAI Timestamp

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

2

TAI ns [27:0]

2

TAI seconds [23:0]

TAI flags

TAI ns [29:28]

2

Global Event Number [11:0]

TAI seconds [39:24]

2

Global Event Number [39:12]

TAI flags: 2 - timecode is valid, otherwise invalid.

Relative Timestamp

Relative timestamp is reset every spill.

Timestamp frequency: 83.333 MHz

4 - Relative Timestamp

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

4

reserved

timestamp bits 23:0

5 - Relative Timestamp and trigger bits

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

5

timestamp bits 31:24

Ext. trigger word

trigger word

Input Pulse Counters

7 - input counters

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

7

unblocked input 0 count

...

7

unblocked input 39 count

Counter number is its position in readout data. Counters are cleared at the beginning of spill and after every trigger.

End of spill data

Logic State Counters

0 - logic state counters, matched (excluding dead time)

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

0

matched and triggered logic state count

1 - logic state counters, all (triggered and dead time)

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

1

unblocked logic state count

First logic state (number 0) is the trigger output. Counters are cleared at the beginning of spill.

Trigger Word Bits

Input Counters Mapping

Input counter are enabled by TTC SPILL signal. The mapping between counter number, input channel and trigger logic line is following:


RawData

DataFormatFVME2TMWR (last edited 2014-09-30 19:03:58 by slepnev)