1 /*
   2  *
   3  * ADCM-16 hardware settings and registers definition
   4  *
   5  */
   6 
   7 #ifndef ADCM16_H
   8 #define ADCM16_H 1
   9 
  10 #include <sys/types.h>
  11 
  12 #define ADCM_BOARD_NCH 16
  13 
  14 #define ADCM_MIN_N_SAMP 4
  15 #define ADCM_MAX_N_SAMP 254 /* hardware limit is 8192 */
  16 #define ADCM_MIN_FRAGM_LEN ADCM_MIN_N_SAMP
  17 
  18 #define ADCM_N_CH 32 /* maximum number of channels in system */
  19 #define ADC_NCH ADCM_N_CH
  20 //#define ADCM_BITS 10
  21 //#define ADCM_BASELINE (1<<(ADCM_BITS-1))
  22 
  23 #define ADC_REALSTEP 10e-9
  24 
  25 #define ADC_TS_FREQ 1e8         /* timestamp counter clock, Hz */
  26 
  27 //#define ADC_PREWIN_MIN 0
  28 //#define ADC_PREWIN_MAX 31 -- this does not allow baseline reconstruction
  29 //#define ADC_PREWIN_MAX 20
  30 
  31 //#define ADC_MATCHWIN_MIN 1
  32 //#define ADC_MATCHWIN_MAX 63
  33 
  34 //#define ADC_LATENCY_MIN 0
  35 //#define ADC_LATENCY_MAX 30
  36 //#define ADC_LATENCY_OFFSET 0
  37 
  38 #define ADC_MAX_GAIN 4095
  39 #define ADC_DEFAULT_GAIN 700
  40 #define ADC_GAIN_0dB 70
  41 //#define ADC_MAX_DATA ((1<<ADCM_BITS)-1)
  42 //#define ADC_MIN_DATA 0
  43 //#define ADC_MAX_THR ADC_MAX_DATA
  44 //#define ADC_MIN_THR ADC_MIN_DATA
  45 
  46 #define ADCM_TRIG_RUN  0x8000
  47 #define ADCM_TRIG_TEST 0x4000
  48 
  49 #define ADCM_TRIGBIT_EXT1 0x1
  50 #define ADCM_TRIGBIT_EXT2 0x2
  51 //#define ADCM_TRIGBIT_EXT3 0x4
  52 #define ADCM_TRIGBIT_INT  0x8
  53 
  54 #define ADCM_CCTRL_BIT_CMPEN 0x0001
  55 #define ADCM_CCTRL_BIT_S     0x0002
  56 #define ADCM_CCTRL_BIT_M     0x0004
  57 #define ADCM_CCTRL_BIT_TEST  0x0008
  58 #define ADCM_CCTRL_BIT_ZERO  0x0010
  59 #define ADCM_CCTRL_BIT_INV   0x0020
  60 
  61 #endif /* ADCM16_H */
  62