Generic VME module registers
It is required to comply with this specification for module to be automatically configured in VMEDAQ.
Module shall support:
- CR/CSR (AM 0x37, custom spec, not VME64)
- A16 D32 R/W (AM 0x29) - register I/O
- A24 D32 R/W (AM 0x39) - memory I/O
- A32 BLT read chained (AM 0x0B)
Register I/O
AM 0x29, A16 D32
AM 0x29 (A16 D32) Registers |
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Reg |
Address |
Name |
Access |
0 |
0x0000 |
Control |
R/W |
1 |
0x0004 |
- |
- |
2 |
0x0008 |
- |
- |
3 |
0x000C |
JTAG |
- |
4 |
0x0010 |
- |
- |
5 |
0x0014 |
- |
- |
6 |
0x0018 |
- |
- |
7 |
0x001C |
TEST |
R/W |
8 |
0x0020 |
JTAG32 |
R/W |
9 |
0x0024 |
Status |
Read Only |
.. |
.. |
.. |
.. |
16 |
0x0040 |
Serial_ID_1_Lo |
Read Only |
17 |
0x0044 |
Serial_ID_1_Hi |
Read Only |
18 |
0x0048 |
Temperature_1 |
Read Only |
19 |
0x004C |
Temperature_2 |
Read Only |
20 |
0x0050 |
Firmware version |
Read Only |
21 |
0x0054 |
Firmware revision |
Read Only |
Reg 0, @0x0000, Control, R/W
- [0] run enable
- [1] reset
- [2] CBLT readout enable
- [3] Dummy BLT readout enable
- [19:4] reserved
- [20] middle in chain
- [21] last in chain
- [22] first in chain
- [31:23] reserved
Reg. 9, @0x0024, Status, read-only
- [0] TTC clock present
- [1] module Ok
- [2] subdevice 0 Ok
- [3] subdevice 1 Ok
- [4] subdevice 2 Ok
- [5] subdevice 3 Ok
- [6] subdevice 4 Ok
- [7] subdevice 5 Ok
- [8] subdevice 6 Ok
- [9] subdevice 7 Ok
- [10] subdevice 8 Ok
- [11] RegIO error (timeout) (active low)
- [12] TTC link down or error (active low)
- [13] Readout error (active low)
- [14] Readout buffer overflow (active low)
- [15] WR Time error (active low)
- [16] 1-Wire ID ready
- [17] Network error (active low)
- [31:18] reserved
Optional Registers
Reg. 3, @0x000C, JTAG, JTAG Serial Port
- [0] TDI/TDO
- [1] TMS
- [31:2] reserved
Reg. 7, @0x001C, TEST
- [31:0] reserved for factory test
Reg. 8, @0x0020, JTAG32, JTAG Serial Port Block Mode
- [31:0] TDI/TDO
Reg. 16, @0x0040, SERIAL_ID_lo, unique ID bits 31:0
- [31:0] SERIAL_ID(31:0)
Reg. 17, @0x0044, SERIAL_ID, unique ID bits 63:32
- [31:0] SERIAL_ID(63:32)
Reg. 18, @0x0048, TEMP, Temperature sensor 1
- [31:16] reserved
- [15:0] temperature
Reg. 19, @0x0044, TEMP, Temperature sensor 2
- [31:16] reserved
- [15:0] temperature
CR/CSR
AM 0x37, A24 D16
Reg. 0 @0x0000, CR0, read-only
- [15:8] vendor ID (constant 0xA6)
- [7:0] reserved (0)
Reg. 1 @0x0002, CR1, read-only
- [15] reserved (0)
[14:8] module ID
- [7:0] module revision
Reg. 3 @0x0004, CSR, R/W
- [15:8] BAR (bits 10:8 should be zero)
- [7:0] reserved
Base address bits sets the following address bits:
- A16 - bits A15:A11
- A24 - bits A23:A19
- A32 - bits A31:A27
Power-on BAR value should be {GA4:GA0,0,0,0}.