## page was renamed from VmedaqRawdata
== VME DAQ Rawdata Format ==
Raw data is stored as is from the hardware. Minimal quantum of data is 4 bytes (32 bits). Intel byte order is used.
<<TableOfContents>>

== Data Stream Structure ==
Raw data stream is split in spills beginning with SHDR and ending with STRL, the data in between is a sequence of zero or more events.
Event begins with EHDR and ends with ETRL. The data between event header and trailer is a sequence of module data blocks. Module data starts with MHDR and ends with MTRL. Module data is any number of words of type DATA.

SHDR
 EHDR
  MHDR
   DATA
   ...
  MTRL
  ...
 ETRL
 ...
STRL
...

== Data Types ==
||<-32 rowclass="bits">Raw data word structure by bits, MSB left||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>type||<:-28>data||

Type is one of the following:
||type, bin||type, hex||code||description||
||0000||0||<|8>DATA||<|8>Module data||
||0001||1||
||0010||2||
||0011||3||
||0100||4||
||0101||5||
||0110||6||
||0111||7||
||1000||8||MHDR||Module header||
||1001||9||MTRL||Module trailer||
||1010||A||EHDR||Event header||
||1011||B||ETRL||Event trailer||
||1100||C||SHDR||Spill header||
||1101||D||STRL||Spill trailer||
||1110||E||STAT||Status||
||1111||F||DATA||16-bit module data||

== Data Word Details ==
||<-32 rowclass="bits">SHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||0||0||<:-4>0||<:-4>spill type||<:-20>reserved||

||<-32 rowclass="bits">STRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||0||1||<:-4>0||<:-4>spill type||<:-20>reserved||

Spill type:
 . 0 - Normal data
 . 1 - End of spill data
 . 2..15 - reserved

||<-32 rowclass="bits">EHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||1||0||<:-8>reserved||<:-20>event number||

||<-32 rowclass="bits">ETRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||1||1||<:-12>reserved||<:-16>word count||

||<-32 rowclass="bits">MHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||0||0||<:-5>[[VME64xGeographical|slot number]]||<:-7>[[VmeModuleId|module ID]]||<:-16>event number||

||<-32 rowclass="bits">MTRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||0||1||<:-5>reserved||<:-3>CBLT flags||<:-2>reserved||RE||RO||<:-16>word count||

 . RE - module readout error (active low)
 . RO - module readout overflow (active low)

== Module Specific Data Format by Module ID ==
 * [[DataFormatTQDC|TQDC]]
 * [[DataFormatTTCM|TTCM]]
 * [[DataFormatTDC|TDC]] family: MTDC-64, TDC-96, PhTDC