## page was renamed from VmedaqRawdata
== VME DAQ Rawdata Format ==
Raw data is stored as is from the hardware. Minimal quantum of data is 4 bytes (32 bits). Intel byte order is used.
<<TableOfContents>>

== Data Stream Structure ==
Raw data stream is split in spills beginning with SHDR and ending with STRL, the data in between is a sequence of zero or more events.
Event begins with EHDR and ends with ETRL. The data between event header and trailer is a sequence of module data blocks. Module data starts with MHDR and ends with MTRL. Module data is any number of words of type DATA.

{{attachment:VMEDAQ_Raw_Format_FSM.svg|VMEDAQ Format FSM}}

{{attachment:vmedaq_raw_format_spill.png|Spill}}
{{attachment:vmedaq_raw_format_event.png|Event}}
{{attachment:vmedaq_raw_format_module.png|Module}}

== Data Types ==
||<-32 rowclass="bits">Raw data word structure by bits, MSB left||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>type||<:-28>data||

Type is one of the following:
||type, bin||type, hex||code||description||
||0000||0||<|8>DATA||<|8>Module data||
||0001||1||
||0010||2||
||0011||3||
||0100||4||
||0101||5||
||0110||6||
||0111||7||
||1000||8||MHDR||Module header||
||1001||9||MTRL||Module trailer||
||1010||A||EHDR||Event header||
||1011||B||ETRL||Event trailer||
||1100||C||SHDR||Spill header||
||1101||D||STRL||Spill trailer||
||1110||E||STAT||Status||
||1111||F||PADD||Padding||

== Data Word Details ==
||<-32 rowclass="bits">SHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||0||0||spill type||<:-7>reserved||<:-20>reserved||

||<-32 rowclass="bits">STRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||0||1||spill type||<:-7>reserved||<:-20>reserved||

Spill type:
 . 0 - Normal data
 . 1 - End of spill data

||<-32 rowclass="bits">EHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||1||0||<:-8>reserved||<:-20>event number||

||<-32 rowclass="bits">ETRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||1||1||<:-4>readout_status||<:-24>word count||

readout_status bits:
 . [0] - timeout
 . [3:1] - reserved

||<-32 rowclass="bits">MHDR||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||0||0||<:-5>[[VME64xGeographical|slot number]]||<:-7>[[VmeModuleId|module ID]]||<:-16>event number||

||<-32 rowclass="bits">MTRL||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||0||0||1||<:-8>checksum||AE#||TE#||RE#||RO#||<:-16>word count||

 . AE# - module access error (active low)
 . TE# - module ttc error (active low)
 . RE# - module readout error (active low)
 . RO# - module readout overflow (active low)
 . checksum is CRC-8 (ETSI EN 302 307, 5.1.4) of module data including MHDR but not including MTRL (available in firmware rev. 14019 and later)

||<-32 rowclass="bits">STAT||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||1||0||<:-4>type||<:-24>status data||

status types:
 . 0000 - reserved
 . 0001 - Thermometry, data bits 23:20 - id, bits 19:0 is module temperature in 1/256 deg C steps

||<-32 rowclass="bits">PADD||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||1||1||1||1||<:-28>0xFFFFFFF||

== Module Specific Data Format by Module ID ==
 * [[DataFormatBric|BRIC]]
 * [[DataFormatTQDC|TQDC]]
 * [[DataFormatTTCM|TTCM]]
 * [[DataFormatTDC|TDC]] family: MTDC-64, TDC-96, TDC64V, TDC32VL
 * [[DataFormatMSC|MSC]]

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[[CategoryRawData|RawData]] | [[CategoryVME|VME]]