= TQDC16VS-E CSR =

* Compatible with [[MlinkCsr|MLink CSR]]

'''Base address - 0x0040, address mask - 0x001F.'''

Reg 0x0000 - Control, R/W
 . [0]    - softclear
 . [1]    - counters lock
 . [2]    - stream reset
 . [14:3] - reserved
 . [15]   - run

Reg 0x0001 - reserved

Reg 0x0002 - Device ID, RO

Reg 0x0003-0x0005 - reserved

Reg 0x0006 - Serial ID MSB, RO

Reg 0x0008 - Live Magic, R/W

Reg 0x000a - ADC channel memory depth, in kilosamples

Reg 0x000b - Board Temperature, RO

Reg 0x000c - F/W Version, RO

Reg 0x000d - F/W Revision, RO

Reg 0x000e - Serial ID LSB, RO

Reg 0x000f - M-Stream config
 . [2:0] - log2 from number of retransmitting buffers
 . [3]   - m-stream multi-ack
 . [15:4] - reserved

Reg 0x0010-0x0013 - OneWire ID (64-bit), RO

Reg 0x0014 - reserved

Reg 0x0015 - PCB Version, RO (add in version 2.1.43)
 . [15:8] - major bits
 . [7:0]  - minor bits

Reg 0x0016~0x001b - reserved

Reg 0x001c-0x001f - Uptime counter (64-bit), RO (add in version 2.1.43)

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[[CategoryCsr|CSR]] [[CategoryMlinkCsr|MLink CSR]] [[CategoryMlinkRegisters|MLinkRegisters]]