= TDC and ADC System Registers = Intended to use with: [[TQDC16VS-E]], [[TDC72VXS]], [[TDC64VHLE-E]], PHOS-FEC. Registers are 16 bit width. 32-bit and 64-bit data is packed as following: ||Reg # ||64-bit word || ||0x70 ||bits 15:0 || ||0x71 ||bits 31:16 || ||0x72 ||bits 47:32 || ||0x73 ||bits 63:48 || ---- == Register I/O == ||<-32 rowclass="bits">[[#SYS_REGS|System Registers]], 0x0000 - 0x3FFF|| ||<:>Address range||<:>Module || Registers Page || ||0x0040 - 0x005F |||| [[MlinkCsr|M-Link CSR]] || ||0x0060 - 0x007F || [[#SYS_RUN_CTRL|Run Control]] ||[[TADC Run Logic]] || ||0x0100 - 0x01FF || [[#SYS_REG_TRG|Trigger control & statistic]] ||[[Trigger Control Status Registers]] || ||0x0200 - 0x02FF || HPTDC JTAG Controller || [[https://afi-project.jinr.ru/projects/hptdc-jtag-controller/wiki|HPTDC Controller Registers]] || ||0x0300 - 0x03FF || [[#SYS_REG_ADC|ADC Core Registers]] ||[[TADC System ADC Core Registers]] || ||0x0400 - 0x04FF || [[#SYS_REG_WRE|WR Time Emulator Registers]] || || ||0x0500 - 0x05FF || [[#SYS_REG_DES|Deserializers]] || || ||0x0600 - 0x06FF || [[#SYS_REG_HIT|Input Hits Core ]] ||[[TADC System Hit Core Registers]] || ||0x0700 - 0x07FF || Run Statistic ||[[Run Statistic Module]] || ||0x0800 - 0x08FF || WhiteRabbit Status ||[[WR_Status_Registers|WR Status Registers]] || ||0x0900 - 0x09FF || Statistics Readout ||[[Statistics Readout Module v1.0|Statistics Readout Module]] || ||<-32 rowclass="bits">[[#BOARD_REGS|Board Level Registers]], 0x4000 - 0x7FFF|| ||<:>Address range ||<:>Module || ||0x4000 - 0x40FF || [[MCU Registers v2.0]] || ||0x4100 - 0x41FF || [[#ADC_SPI|SPI communication to ADCs]] || ||0x4200 - 0x42FF || [[#DAC_THR|Thresholds setup]] || ||0x7000 - 0x70FF || [[SPI_NOR_Flash_Programmer|Flash Programmer]] || ---- ---- <> == System Registers == '''Base address - 0x0000, address mask - 0x3FFF.''' ---- <> CSR ---- <> Trigger control & statistic ---- <> TDC Core Registers ---- <> <> ---- <> WR Time Emulator Registers ---- <> Deserializers control ---- <> <> ---- ---- <> == Board Level Registers == '''Base address - 0x4000, address mask - 0x3FFF.''' ---- <> SPI communication to ADCs ---- <> Thresholds setup ---- [[CategoryMlinkRegisters|MLinkRegisters]]