RegisterMapEvadc

EVADC Register Map

Hardware: EVADC, ADC8BE-DRS

Registers are 16 bit width. 32-bit and 64-bit data is packed as following (Little Endian):

Reg #	64-bit word
0x70	bits 15:0
0x71	bits 31:16
0x72	bits 47:32
0x73	bits 63:48

Register Map

0x040 - 0x05F	MLink CSR
0x108 - 0x10B	TxDAC and switch control
0x110 - 0x111	ad5328x2
0x118 - 0x11F	TxDAC AD9788 SPI
0x120 - 0x12F	ADC AD9252 SPI
0x400 - 0x41F	DRS control

Registers

0x0108 SWITCH_CONTROL (AD9788_OUTPUT_CTRL)

[0] - 0: input signal, 1: calibration
[1] - 0: pattern, 1: DDS output

0x0109 AD9788_CTRL

[0] - TX Enable
[1] - reset TxDAC

0x010A AD9788_DATA

[15:0] - data pattern

0x010B TXDAC_STATUS

[0] - PLL lock

EVADC DRS Ethernet ADC MLinkRegisters

RegisterMapEvadc (last edited 2013-10-18 14:45:47 by slepnev)