## page was renamed from Logic
## page was renamed from Scalers
= Trigger Logic and Scaler Modules =
   * user programmable logic
   * delay compensation in all channels individually up to 800 ns
   * pulse counters on all inputs
   * logic state counters
   * programmable output delay for data readout systems

||model||standard||inputs||description||status||
||<:>[[FVME2TMWR|{{attachment:fvme2tm-thm.png}}]]<<BR>>'''[[FVME2TMWR]]'''||VME64x||4 TTL<<BR>>32 ECL/LVDS||41.667 MHz Clock source, trigger logic<<BR>>4 majority units, 4 logic lanes, regular and random pulsers<<BR>>[[WhiteRabbit]] compatible||active||
||<:>[[TTCM|{{attachment:ttcm-thm.png}}]]<<BR>>'''[[TTCM]]'''||VME64x||8 NIM<<BR>>32 ECL/LVDS||40 MHz Clock source, trigger logic<<BR>>4 majority units, 4 logic lanes, regular and random pulsers||obsolete||
||<:>[[MSC16V|{{attachment:msc16v-thm.png}}]]<<BR>>'''[[MSC16V]]'''||VME64x||16 analog channels||Discriminator, multihit scaler with memory||active||
||<:>[[MSC8E|{{attachment:msc8e-thm.png}}]]<<BR>>'''[[MSC8E]]'''||Ethernet||8 analog channels||Discriminator, multihit scaler with memory||suspended||