FVME Registers
Version 1.0 Registers
FVME controller registers: 0x0000 - 0x3FFF
0x0000 - General Control (R/W)
- [2:0] - Spill source select (IRQ7..IRQ1, TTC)
- [5:3] - Trigger source select (IRQ7..IRQ1, TTC)
- [6] - softclear (break cycle)
- [7] - stat_clr (clear statistic counters)
- [15:8] - reserved
0x0001 - Run Mode Control (R/W)
- [14:0] - reserved
- [15] - RUN mode enable
0x0002 - Program mode VME AM, flags (R/W)
- [5:0] - Address Modifier code
- [12:6] - reserved
- [13] - WRITE enable (1:write, 0:read)
- [14] - IACK enable
- [15] - CBLT enable
0x0003 - RUN mode VME AM, flags (R/W)
- [5:0] - Address Modifier code
- [12:6] - reserved
- [13] - WRITE enable (1:write, 0:read)
- [14] - IACK enable
- [15] - CBLT enable
0x0004 - VME Address lo (R/W)
- [0] - LWORD (A0)
- [15:1] - A15:A1
0x0005 - VME Address hi (R/W)
- [15:0] - A31:A16
0x0006 - VME Write Data lo (R/W)
- [15:0] - D15:D0
0x0007 - VME Write Data hi (R/W)
- [15:0] - D31:D16
0x0008 - VME Read Data lo (R)
- [15:0] - D15:D0
0x0009 - VME Read Data hi (R)
- [15:0] - D31:D16
0x000A - VME Operation Status (R)
- [0] - Timeout
- [1] - DTACK
- [2] - BERR
- [8:3] - reserved
- [15:9] - IRQ7..IRQ1
0x000B - reserved (R)
- [15:0] - reserved
0x000C - Test Link Setup (R/W)
[15:0] - test data lo Link Control Frame interval, 25ns step, default 0x8000
0x000D - Test (R/W)
- [15:0] - test data hi
0x000E - Spill Wordcount lo (R)
- [15:0] - SPWC[15:0]
0x000F - Spill Wordcount hi (R)
- [15:0] - SPWC[31:16]
Extended Registers
0x0042 - FVME_REG_DEVICE_ID (0xD100)
0x0050 - FVME_REG_SERIAL_ID [15:0]
0x0051 - FVME_REG_SERIAL_ID [31:16]
0x0052 - FVME_REG_SERIAL_ID [47:32]
0x0053 - FVME_REG_SERIAL_ID [63:48]
0x0054 - FVME_REG_TEMPERATURE
0x0056 - FVME_REG_FW_VER
0x0057 - FVME_REG_FW_REV
0x0080..0x009F - Statistic Counters (32-bit)