= TQDC Raw Data Format =

Hardware: [[TQDC-16]] [[TQDC16VS]]

See also: [[VmeDaqRawdataFormat|VME DAQ Rawdata Format]]
[[http://afi.jinr.ru/ds/adc/linear/ltm9011-14.pdf|LTM9011-14 datasheet]]

||<-2 rowclass="bits">Data types||
||0||input counters high bits||
||1||input counters low bits||
||2||TDC header||
||3||TDC trailer||
||4||ADC timestamp or TDC data||
||5||TDC or ADC data||
||6||TDC error||
||7|| ||

ADC clock is:
 * 12.5 ns for old systems
 * 12 ns for new systems
 * 8 ns for TQDC16VS
TDC clock is:
 * 25 ns for old systems
 * 24 ns for new systems

||<-32 rowclass="bits">0 - input counters high bits||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>0||<:-9>channel||0||0||0||<:-16>counter bits 31:16||

||<-32 rowclass="bits">1 - input counters low bits||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>1||<:-9>channel||0||0||0||<:-16>counter bits 15:0||
Number of adc hits in past burst.
If channel=0x1FF than counter bits - is time of last burst, else channel should be masked with 0x1F

||<-32 rowclass="bits">2 - TDC event header||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>2||<:-2>0||<:-2>reserved||<:-12>event number||<:-12>TDC timestamp||

TDC timestamp in number of TDC clocks since global trigger timestamp found in event header.

||<-32 rowclass="bits">3 - TDC event trailer||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>3||<:-2>0||<:-2>reserved||<:-12>event number||<:-12>TDC word count||

||<-32 rowclass="bits">4, mode!=0 - ADC timestamp, word 1||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>4||<:-2>mode||<:-2>reserved||<:-5>channel||0||0||'''0'''||<:-16>Trigger timestamp||

Trigger timestamp in number of ADC clocks since start of spill.

||<-32 rowclass="bits">4, mode!=0 - ADC timestamp, word 2||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>4||<:-2>mode||<:-2>reserved||<:-5>channel||0||0||'''1'''||<:-16>ADC timestamp||

ADC timestamp in number of ADC clock since start of spill.

||<-32 rowclass="bits">4, mode=0 - TDC data||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>4||<:-2>mode=0||<:-2>rcdata||<:-5>channel||<:-19>data||

||<-32 rowclass="bits">5 - TDC and ADC data, select by mode field||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>5||<:-2>mode||<:-2>rcdata||<:-5>channel||<:-19>data||

Channels 16-31 are reserved.

Mode 0 - TDC time measurement
 . data bits 18:0 = number of 100 ps time intervals since global trigger timestamp found in event header. When 25 ps mode is active, use rcdata[1:0] for 2 LSB bits of time measurement.


Mode 1 - calibration
 . data bits 15:0 = adc sample.
 . data bits 18:16 - reserved

Mode 2 - ADC sampling
 . data bits 15:0 = adc sample.
 . data bits 18:16 - reserved

Mode 3 - ADC integration
 . data bits 18:0 - sum of adc samples

ADC is sampling at 100 MHz with resolution of 10 bits.

||<-32 rowclass="bits">6 - TDC error||
||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0||
||<:-4>6||<:-13>reserved||<:-15>TDC error flags||

TDC error flags bits:
 . [0] Hit lost in group 0 from read-out fifo overflow
 . [1] Hit lost in group 0 from L1 buffer overflow
 . [2] Hit error have been detected in group 0
 . [3] Hit lost in group 1 from read-out fifo overflow
 . [4] Hit lost in group 1 from L1 buffer overflow
 . [5] Hit error have been detected in group 1
 . [6] Hit lost in group 2 from read-out fifo overflow
 . [7] Hit lost in group 2 from L1 buffer overflow
 . [8] Hit error have been detected in group 2
 . [9] Hit lost in group 3 from read-out fifo overflow
 . [10] Hit lost in group 3 from L1 buffer overflow
 . [11] Hit error have been detected in group 3
 . [12] Hits rejected because of programmed event size limit
 . [13] Event lost (trigger FIFO ovefrlow)
 . [14] Internal fatal chip error has been detected

Most important error bits are 12 and 13. Error bit 14 should be ignored.

For detailed description of TDC please refer to [[http://tdc.web.cern.ch/tdc/hptdc/docs/hptdc_manual_ver2.2.pdf|HPTDC manual]].

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[[CategoryRawData|RawData]]