= ADC64WR - MPD Trigger Registers = * [[SDB Device ID]] 0xcb4e1468 * Hardware: [[ADC64s2|ADC64s2_V6]] Registers are 16 bit width. 32-bit and 64-bit data is packed as following: ||Reg # ||64-bit word || ||0x70 ||bits 15:0 || ||0x71 ||bits 31:16 || ||0x72 ||bits 47:32 || ||0x73 ||bits 63:48 || == Register Map == ||<:>Address range||<:>Module || ||00h ~ 7Fh ||[[#MPD_TRIG_CSR|CSR]] || ||80h ~ FFh ||[[#MPD_TRIG_SC|ADC static compensation]] || ||100h ~ 17Fh ||[[#MPD_TRIG_CRSW|Crosspoint switch]] || ||180h ~ 1FFh ||[[#MPD_TRIG_THR|Trigger groups thresholds]] || ---- <> === CSR === '''local base address - 00h, address mask - 7Fh''' * 00h - '''Identification''' ''cb4e1468'', 32 bits, RO static * 02h - '''Control''', R/W . [0] - reset * 04h - '''Number of trigger groups''', RO static * 05h - '''Number of channels for one trigger group''', RO static * 06h - '''Number of ADC channels''', RO static * 08h - '''Trigger channels enable''', 128 bits, R/W * 10h - '''Trigger channels polarity''', 128 bits, R/W . 0 - active-high, 1 - active-low ---- <> === ADC static compensation === '''local base address - 80h, address mask - 7Fh''' * register # = ADC channel # * 16 bits registers * R/W ---- <> === Crosspoint switch === '''local base address - 100h, address mask - 7Fh''' * [[Crosspoint Switch]] module * use to map ADC channels into trigger channels <> ---- <> === Trigger groups thresholds === '''local base address - 180h, address mask - 7Fh''' * register # = trigger group # * 32 bits registers * R/W ---- [[CategoryAdc64|ADC64]] [[CategoryAdc|ADC]]