#<> = TDC72VXS Data Format = Hardware [[TDC72VXS]] TDC72VXS payload data is encapsulated in [[MStream_2_2|M-Stream 2.2]] protocol using Data Subtype 0. ||<-32 rowclass="bits">M-Stream Header|| ||<:>word #||<:>byte offset||<:>bits||<:>description|| ||<:|4> 0 ||<:|4> 0 || 31:24 || [[DeviceId|Device ID]] || || 23:18 || Flags || || 17:16 || Subtype || || 15:0 || Fragment length, 4*(N-2)|| ||<:|2> 1 ||<:|2> 4 || 31:16 || Packet ID || ||15:0||Fragment offset (bytes)|| ||<-32 rowclass="bits">M-Stream Subtype 0, first fragment|| ||<:> 2 ||<:> 8 || 31:0 || Device Serial || ||<:|2> 3 ||<:|2> 12 || 31:24 || reserved || || 23:0 || Event number || ||<:-4>'''M-Stream Payload''' ''in [[MpdDeviceRawDataFormat#MStream_Block|MPD rawdata]]''|| ||<:> 4 ||<:> 16 || 31:0 ||<|2> Event [[TAI 64-bit Timestamp]] || ||<:> 5 ||<:> 20 || 31:0 || ||<:> 6 ||<:> 24 || 31:0 ||<|3> Event Data || ||<:-3> ... || ||<:> N-1 ||<:> 4*(N-1) || 31:0 || ||<-32 rowclass="bits">M-Stream Subtype 0, next fragments|| ||<:> 2 ||<:> 8 || 31:0 ||<|3> Event Data || ||<:-3> ... || ||<:> N-1 ||<:> 4*(N-1) || 31:0 || ---- == Event Data format == ||<:>'''word #'''||<:>'''byte offset'''||<:>'''bits'''||<:>'''description'''|| ||<:> 0 ||<:> 0 || 31:0 ||<|3> Data Block #1 (S,,1,, bytes) || ||<:-3> ... || ||<:> S,,1,,/4-1 ||<:> S,,1,,-4 || 31:0 || ||<:> S,,1,,/4 ||<:> S,,1,, || 31:0 ||<|3> Data Block #2 (S,,2,, bytes) || ||<:-3> ... || ||<:> (S,,1,,+S,,2,,)/4-1 ||<:> S,,1,,+S,,2,,-4 || 31:0 || ||<:-4> ... || ||<:-4> Till the last data block || ||<:-4> ... || ---- == Data Block format == ||<:>'''word #'''||<:>'''byte offset'''||<:>'''bits'''||<:>'''description'''|| ||<:|3> 0 ||<:|3> 0 || 31:28 || Data Type || || 27:16 || Data Block specific bits || || 15:0 || Data Payload length (4*(N-1) bytes) || ||<:> 1 ||<:> 4 || 31:0 ||<|3> Data Payload || ||<:-3> ... || ||<:> N-1 ||<:> 4*(N-1) || 31:0 || . [[#TDC_BLK|TDC Data Block]] . [[#STAT_BLK|Statistic Data Block]] ---- <> === TDC Data Block === . __Data Type is 0x0__ TDC Data Block specific bits: . [27:17] - reserved . [16] - event FIFO overflow === TDC Data Payload === TDC event header and TDC event trailer are optional and in most cases will not be used. ||<-32 rowclass="bits">TDC event header|| ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| ||<:-4>2||<:-4>TDC ID||<:-12>Event number||<:-12>TDC timestamp|| TDC timestamp in number of 25 ns time intervals since global trigger timestamp found in event header. ||<-32 rowclass="bits">TDC event trailer|| ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| ||<:-4>3||<:-4>TDC ID||<:-12>Event number||<:-12>TDC word count|| ||<-32 rowclass="bits">TDC data, leading/trailing edge|| ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| || 0|| 1|| 0|| E||<:-7>channel||<:-21>data|| . E = 0 - leading egde. . E = 1 - trailing egde. TDC time measurement . data bits [20:2] = number of 100 ps time intervals since global trigger timestamp found in event header; . data bits [1:0] = rcdata[1:0]. ||<-32 rowclass="bits">6 - TDC error|| ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| ||<:-4>6||<:-4>TDC ID||<:-9>reserved||<:-15>TDC error flags|| TDC error flags bits: . [0] Hit lost in group 0 from read-out fifo overflow . [1] Hit lost in group 0 from L1 buffer overflow . [2] Hit error have been detected in group 0 . [3] Hit lost in group 1 from read-out fifo overflow . [4] Hit lost in group 1 from L1 buffer overflow . [5] Hit error have been detected in group 1 . [6] Hit lost in group 2 from read-out fifo overflow . [7] Hit lost in group 2 from L1 buffer overflow . [8] Hit error have been detected in group 2 . [9] Hit lost in group 3 from read-out fifo overflow . [10] Hit lost in group 3 from L1 buffer overflow . [11] Hit error have been detected in group 3 . [12] Hits rejected because of programmed event size limit . [13] Event lost (trigger FIFO ovefrlow) . [14] Internal fatal chip error has been detected Most important error bits are 12 and 13. Error bit 14 should be ignored. ||<-32 rowclass="bits">7 - Padding|| ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| ||<:-4>7||<:-28>0|| For detailed description of TDC please refer to [[http://tdc.web.cern.ch/tdc/hptdc/docs/hptdc_manual_ver2.2.pdf|HPTDC manual]]. ---- <> === Statistic Data Block === . __Data Type is 0xF__ Statistic Data Block specific bits: . [27:18] - reserved . [17] - RegIO Error . [16] - RegIO Timeout === Statistic Data Payload === Consist of fixed set of module registers: . reg 0x004B - Board Temperature . reg 0x004C - FPGA F/W Version . reg 0x004D - FPGA F/W Revision . reg 0x4001 - Onboard PLL Status . reg 0x4002 - Onboard PLL Unlock Counter . reg 0x4003 - PLL Temperature . reg 0x4004 - Temperature #1 from MCU . reg 0x4005 - Temperature #2 from MCU . reg 0x4006 - Temperature #3 from MCU . reg 0x4007 - Temperature #4 from MCU . reg 0x4008 - BMC F/W Revision . reg 0x4009 - BMC F/W Version . reg 0x400A - BMC Overal System Status . reg 0x400B - BMC Power Status . reg 0x400C - BMC PLL Status See also [[TDC72VXS_Registers|TDC72VXS Registers]] ||<:-32 rowclass="bits"> Format of statistics data word || ||31||30||29||28||27||26||25||24||23||22||21||20||19||18||17||16||15||14||13||12||11||10||9||8||7||6||5||4||3||2||1||0|| ||<:-16> RegIO Address ||<:-16> RegIO Read Data || ---- [[CategoryRawData|RawData]]