= NucloRF module registers =

Hardware: [[NucloRF]]

Registers are 16 bit width. 32-bit and 64-bit data is packed as following:
||Reg #||64-bit word||
||0x70||bits 15:0||
||0x71||bits 31:16||
||0x72||bits 47:32||
||0x73||bits 63:48||

== Register Map ==

||0x00 - 0x17 ||Board Control||
||0x18 - 0x1F||AD9788 SPI||
||0x20 - 0x3F||frequency correction||
||0x40 - 0x5F||[[MlinkCsr|M-Link CSR]]||


=== Main control registers ===

Reg 0x02, 32-bit phase offset for second DDS, R/W

Reg 0x0a, 32-bit B0 value(float), R/W

Reg 0x0c, 32-bit B step value(float), R/W

Reg 0x0e, 32-bit fixed frequency value, R/W

Reg 0x12, write fixed 32-bit B value, read current B value

Reg 0x14, 32-bit RCQW value(float), R/W

Reg 0x16, 32-bit KCLF value(float), R/W

=== TxDAC control registers ===

Reg 0x08, AD9788 output Control, R/W

Reg 0x09, Control, R/W
 . bit 0 - enable TxDAC
 . bit 1 - reset TxDAC
 . bit 2 - FREQ_INT source select : 0 - reg ..., 1 - FPU

=== Offset DAC registers ===

Reg 0x10, AD5328-1 SPI write data, R/W

Reg 0x11, AD5328-2 SPI write data, R/W

=== TxDAC SPI registers ===

Reg 0x18, AD9788 SPI address, R/W

Reg 0x19, AD9788 SPI write data 1, R/W

Reg 0x1a, AD9788 SPI write data 2, R/W

Reg 0x1b, AD9788 SPI read data bits 15-0, RO

Reg 0x1c, AD9788 SPI read data bits 31-16, RO

=== Frequency correction registers ===

Reg 0x20, 32-bit TXDac frequency(KHz), R/W

Reg 0x22, 32-bit B field threshold value(int) for first correction point, R/W 

Reg 0x24, 32-bit correction step(float) for first correction point, R/W 

Reg 0x26, time(ms) of correction delta increase(T1) for first correction point, R/W

Reg 0x27, time(ms) of correction delta constant(T2) for first correction point, R/W

Reg 0x28, time(ms) of correction delta decrease(T3) for first correction point, R/W

Reg 0x29, time(ms) from B-threshold to correction start(T0) for first correction point, R/W

Reg 0x2a, 32-bit B field threshold value(int) for second correction point, R/W 

Reg 0x2c, 32-bit correction step(float) for second correction point, R/W 

Reg 0x2e, time(ms) of correction delta increase(T1) for second correction point, R/W

Reg 0x2f, time(ms) of correction delta constant(T2) for second correction point, R/W

Reg 0x30, time(ms) of correction delta decrease(T3) for second correction point, R/W

Reg 0x31, time(ms) from B-threshold to correction start(T0) for second correction point, R/W

Regs 0x32-0x3f reserved

=== CSR ===

Regs 0x40-0x41 reserved

Reg 0x42, device ID, RO

Regs 0x43-0x4f reserved

Reg 0x50, 64-bit Board Serial Number (DS18B20), RO 

Reg 0x54, current temperature, RO

Reg 0x55, reserved

Reg 0x56, 16-bit, firmware version number, RO

Reg 0x57, 16-bit, firmware revision number, RO 

Regs 0x58-0x7f reserved
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[[CategoryNuclotron|Nuclotron]] [[CategoryNucloRF|NucloRF]] [[CategoryMlinkRegisters|MLinkRegisters]]