= MSC Histograms CSR v1.0 =

 * [[SDB Device ID]] 0x8da907fb
 * [[MSC Histograms CSR v2.0]]

==== Register Map ====

address space depends on number of histogramms

 * 00h - Histogram control, R/W

   . [1] - lock
   . [0] - softclear

 * 01h - Number of RAM address bits for time interval histograms, RO

 * 02h - Number of RAM address bits for histogram plots, RO

 * 80h - Time interval histograms parameter #1 (0x3F800000, 1.0 float, DO NOT CHANGE), 32-bits, R/W

 * 82h - Time interval histograms parameter #2 (0x42580000, 54.0 float, DO NOT CHANGE), 32-bits, R/W 

''__Start from address 100h__ groups for histogram plots registers are placed. One group - one histogram plot. Each group size is 16 addresses.''

 * 100h~10Fh - histogram plot #0 registers

  * 100h - plot slice time (in nanoseconds), 32-bits, R/W
  * 102h - plot current RAM address, 32-bits, RO

 * 110h~11Fh - histogram plot #1 registers

...

 * 1F0h~1FFh - histogram plot #15 registers